The present invention relates to a filter circuit and a receiving device including the filter circuit, and particularly to a technique effectively applied to a filter circuit requiring filter characteristics of a lower cutoff frequency.
The market of wireless mobile communication including cellular phones is expected to shift from voice services to multimedia services which simultaneously provide video, voice, and data for supporting advanced interactive applications in the future. This requires high-speed communication systems for enabling faster wireless packet data access. For example, wireless mobile communication systems are shifting from the second generation typified by GSM (Global System for Mobile Communications) to the third generation typified by WCDMA (Wideband Code Division Multiple Access) as a wider-band communication system and further to the fourth generation-compatible LTE (Long Term Evolution). The third-generation downstream speed has increased to a maximum of 2 Mbps in WCDMA for example. Further, LTE can support a downstream speed of 300 Mbps or more in theory.
Thus, a number of communication systems coexist; accordingly, multimode cellular phone terminals for supporting multiple communication systems are required in the market, and the cost reduction becomes important. The receiving system of low IF (Intermediate Frequency) and direct conversion in a wireless unit of a cellular phone enables the configuration to be simplified by the proper use of circuit design and integration technology in comparison with a heterodyne system etc., and is therefore an effective system solution to reduce the cost of the wireless receiving unit of the multimode cellular phone terminal.
In the receiving system of low IF and direct conversion, it is necessary to have a low-pass filter (LPF) in a baseband after frequency conversion to suppress interfering signals outside a reception band. Patent Documents 1 to 4 disclose related arts of the filter circuit.
U.S. Pat. No. 7,592,864 B2 (Patent Document 1) discloses a filter circuit using a high-pass filter and a capacitance amplifier. The capacitance value of a small capacitance element is amplified by the capacitance amplifier, thereby reducing the area of the filter circuit. The amplification of the capacitance value is implemented by amplifying a voltage applied across the capacitance. In-band noise is filtered by the capacitance, thus bringing about a configuration with little noise degradation.
Japanese Unexamined Patent Publication No. 2009-147526 (Patent Document 2) discloses a complex band-pass filter circuit (BPF) using the phase rotation of two low-pass filters. Specifically, the filter circuit in Patent Document 2 operates as a complex band-pass filter as a whole by feeding back the output of one low-pass filter to the input of the other low-pass filter having a phase difference of 90 degrees. The connection between the two low-pass filters is switched by a switch, so that a band to be limited can be switched between a Low-IF band and a Zero-IF band.
Japanese Unexamined Patent Publication No. 2003-46401 (Patent Document 3) discloses a filter circuit for implementing the characteristics of a band-pass filter by combining a low-pass filter and a high-pass filter (HPF) as a channel selection filter unit for selecting a self-channel signal by band-limiting I and Q signals.
Japanese Unexamined Patent Publication No. 2007-202147 (Patent Document 4) discloses an integrating circuit using a transimpedance amplifier (TIA) for implementing wideband amplification as a whole by negatively feeding back outputs to inputs in a plurality of nested series-coupled transimpedance amplifiers.